The present invention relates to configuration devices used to program devices such as a programmable logic devices or other similar devices.
Programmable logic devices (xe2x80x9cPLDsxe2x80x9d) (also sometimes referred to as PALs, PLAs, FPLAs, EPLDs, EEPLDs, LCAs, or FPGAs), are well-known integrated circuits that provide the advantages of fixed integrated circuits with the flexibility of custom integrated circuits. Such devices are well known in the art and typically provide an xe2x80x9coff the shelfxe2x80x9d device having at least a portion that can be electrically programmed to meet a user""s specific needs. Application specific integrated circuits (xe2x80x9cASICsxe2x80x9d) have traditionally been fixed integrated circuits, however, it is possible to provide an ASIC that has a portion or portions that are programmable; thus, it is possible for an integrated circuit device to have qualities of both an ASIC and a PLD. The term PLD as used herein will be considered broad enough to not necessarily exclude such devices.
In some implementations, a PLD is programmed by the system processor, the system processor being any circuitry primarily responsible for interacting with memory and I/O devices to execute instructions for carrying out system tasks.
Such implementations are acceptable when the processor is not relying on the PLD for its logic operations. However, when the processor would be relying on the PLD for some of its logic (or the PLD itself is the system processor), then it is generally preferable to have a configuration device for configuring the PLD that is in addition to the system processor.
A configuration device for programming a PLD may include a controller and a memory, the controller being any circuitry using information stored in a memory to configure a PLD. Controllers may be implemented as a simplified processor or a controller might be implemented as a processor that is used primarily to perform only a limited range of tasks such as programming a PLD. The controller itself may be implemented as a PLD used to configure another PLD. Current memories such used in PLD configuration devices are generally 16 megabit memory chips. However, configuration device controllers typically only utilize 4-9 megabits of memory. Some pins to the memory may be needed during testing but are excess during actual system implementation. Thus, when implemented, a 16 megabit configuration memory may have, for example, 7 megabits of unused memory locations. Thus, there is a need to address the problem of under-utilization of the configuration device""s memory resources.
The present invention provides an apparatus, system, and method in which a memory of a PLD configuration device is made accessible to other devices.
An embodiment of the present invention implements a PLD configuration device with a pin accessible bus through which a memory of the configuration device is accessed both by a controller of the configuration device and by a processor of the electronic system in which the PLD configuration device is implemented. Arbitration circuitry implements an arbitration scheme that arbitrates access to the configuration device memory between the configuration controller and the processor. In an alternative embodiment, a memory of the PLD configuration device accessed by a controller of the configuration device is accessible to a PLD configured by the PLD configuration device during normal operation of the PLD once it is configured. In another alternative embodiment, a PLD configuration device is part of the PLD itself.
An exemplary arbitration scheme used to implement particular embodiments of the present invention allows a configuration device controller accessing the configuration device memory to complete memory access for configuration purposes without interruption by a processor (which may be a PLD), or by a PLD (which may or may not be acting as a processor) that may, at other times, access the same memory.
By allowing devices in addition to a controller of a configuration device to access configuration device""s memory, the present invention addresses the problem of under-utilization of the configuration device""s memory resources.